The present invention relates to a semiconductor device and a technique for manufacturing the same. Particularly, the present invention relates to a technique applicable effectively to the improvement in reliability of a semiconductor device of a structure having semiconductor packages stacked in multiple stages.
With high integration of semiconductor devices there has been developed an SIP (System In Package) type semiconductor device wherein a semiconductor chip as memory and a semiconductor chip as controller for controlling the memory chip are together mounted in a single semiconductor device to build one system.
The capacity of the memory chip incorporated in the semiconductor device can be changed in accordance with the purpose of use of the product. Such a POP (Package On Package) type configuration as shown in Patent Literature 1 has been considered effective (see, for example, Patent Literature 1).
[Patent Literature 1]    Japanese Unexamined Patent Publication No. 2007-123454